Technical Field
The present invention relates to a data reception device in an interface for transmitting image data to a liquid crystal panel module at high speed.
Related Art
In a market for mobile devices such as laptop PC and tablet PC, there always is a request for reduction in power consumption and cost. Meanwhile, a data processing amount and an operating frequency have steadily increased along with improvement of resolution of a panel and improvement of image quality of a display, and the reduction of the power consumption and the cost reduction have become major problems which conflict thereto.
As flow of drawing data to the panel in the laptop PC or the tablet PC, it is configured to use a processor such as a central processing unit (CPU) and a graphics processing unit (GPU) that are in charge of calculation of the drawing data itself, various calculation processing and graphics processing, a timing controller (TCON) that performs timing control and image processing of the panel using the drawing data, sent from the processor such as the CPU and the GPU, as input, and a source driver (SD) that outputs the drawing data in an analog manner according to specification of the panel using the drawing data from the timing controller as input.
Low-voltage-differential-signaling (LVDS) has been widely used for transmission of video data from the CPU or the GPU to the timing controller of the panel. In recent years, however, an embedded display port (eDP) prescribed by the video electronics standard association (VESA) has been mainly adopted. In the eDP, the drawing data is received through a Main-Link, and control data other than video data is received through an AUX-CH from the CPU or the GPU. The standard of eDP is configured of the Main-Link and the AUX-CH, the Main-Link is a high-speed differential serial line operating at a bit rate of from 1.62 Gbps at a minimum to 8.1 Gbps at a maximum per differential lane (pair), and the AUX-CH is a low-speed differential serial line operating at 1 Mbps.
Further, mobile industry processor interface alliance (mipi)-digital serial-interface (DSI) is used as an interface between the CPU or the GPU and the timing controller in a tablet terminal and the like, which is similar to the eDP. The data processing amount and the frequency have steadily increased along with the improvement of resolution of the panel even in the tablet terminal, and the power consumption becomes a major problem. The mipi-DSI has been widely used as a replacement for the LVDS similarly to the eDP.
In addition, mini-LVDS or the like has been widely adopted as an interface between the timing controller and the source driver. In a recent high-resolution display panel, however, the mini-LVDS has been hardly used because a screw, which is a gap in timing on a transmission path generated when a clock line as a reference signal and a transmission data line are separated, becomes a problem. For this reason, a point-to-point (P2P) type 1:1 transmission scheme, that is, a clock embedded scheme in which a clock and data are superimposed on each other is mainly used (JP 2014-062972 A).
In the case of a 4K2K panel, for example, eight source drivers and one timing controller are mainly used for transmission between the timing controller and the source driver, the timing controller and one source driver are connected only by one lane and the other source drivers are not connected to the timing controller as in the mini-LVDS in the P2P transmission, and thus, it is possible to eliminate branches (stubs) on the transmission path. Further, the clock line is superimposed on the data line without being additionally provided in the P2P, so that it is not necessary to consider the timing skew between the clock and the data, and transmission speed can be improved.
In this manner, an eDP interface, a mipi interface, and a P2P interface have been conventionally known in the market for the laptop PC and the tablet PC.